Senior System-on-Chip (SoC) Logic Design Engineer

SoC Logic Design Engineer Job Details: Job Description: As a Senior SoC Logic Design Engineer in Central Engineering Group, you will play a pivotal role in designing and developing cutting-edge System-on-Chip (SoC) solutions for Intel products and Custom ASIC customers. This position enables you to directly contribute to Intel's mission of creating world-class technology that powers the future of computing. You will work on the forefront of innovation, ensuring the seamless integration of IP blocks, optimizing designs for performance, power, and area, and directly influencing the quality and security of Intel's advanced SoC products. Your expertise will help shape the next generation of technology, empowering millions of users and transforming industries globally. You will lead a team of RTL engineers in developing and delivering advanced SOCs and Subsystems for Server, Client, Networking and AI applications. Key Responsibilities - Develop and implement logic design, register transfer level (RTL) coding, and simulation for SoC designs for Data Center/Networking/Client & AI applications - Integrate IP blocks and subsystems into a full-chip SoC or discrete component design. - Define and apply architecture and microarchitecture features of logic blocks under design. - Perform quality checks on logic design aspects, from RTL to timing and power convergence, ensuring alignment with design goals. - Write and optimize RTL to meet power, performance, area, and timing objectives while maintaining physical implementation integrity. - Review verification plans and implementations to ensure accurate feature verification. - Resolve and implement corrective measures for failing RTL tests to ensure design correctness. - Follow secure development practices to address potential security threats and achieve security objectives within the design. - Collaborate with IP providers to integrate and validate IPs at the SoC level. - Drive quality assurance compliance for efficient IP and SoC handoff processes. Qualifications: Minimum Qualifications - Bachelor's degree in Electrical Engineering, Computer Engineering, or related field with 12+ years of experience, or - Master's degree in the same fields with 10+ years of experience, or - Proficiency in RTL design, coding, and simulation techniques. - Strong understanding of low-power design, SoC integration, and system architecture. - Experience in debugging microarchitecture and simulation. - Expertise in applying front-end SoC quality and efficiency guardrails. Preferred Qualifications - Demonstrated ability to collaborate effectively in cross-functional teams. - Strong analytical and problem-solving skills for complex logic design challenges. - Excellent communication skills to articulate technical concepts and solutions. - Experience in driving innovation and continuous improvement in SoC design methodologies. Join Intel and be part of a talented team dedicated to pushing the boundaries of technology. Apply today and contribute to shaping the future of computing. Job Type: Experienced Hire Shift: Shift 1 (India) Primary Location: India, Bangalore Additional Locations: Business group: The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. • Job posting details (such as work model, location or time type) are subject to change. • ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.