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Senior ASIC Digital Design Engineer (DFT, MBIST, Scan)

salary Not Disclosed
company-logo
job companySandisk India Device Design Centre Pvt.ltd
job location Goraguntepalya, Bangalore
job experience5 - 6+ years Experience in Manufacturing
1 Opening
full_time Full Time

Job Highlights

qualification
All Education levels
gender
All genders
jobShift
5 days working | Day Shift

Job Description

Senior ASIC Digital Engineer (DFT, MBIST, Scan) with 5 to 7 years of experience Company Description Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality. Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward. Job Description We are seeking a highly skilled Staff Engineer specializing in ASIC Development Engineering with a focus on Design for Testability (DFT) to join our team in Bangalore, India. In this role, you will be responsible for developing and implementing advanced DFT strategies for complex ASIC designs, ensuring high-quality, testable, and manufacturable semiconductor products. Lead the development and implementation of DFT architectures for complex ASIC designs Collaborate with cross-functional teams to integrate DFT solutions into the overall ASIC design flow Develop and optimize test patterns using Automatic Test Pattern Generation (ATPG) tools Implement Built-In Self-Test (BIST) solutions for various ASIC components Analyze and improve test coverage, fault coverage, and test time for ASIC designs Troubleshoot and debug DFT-related issues during the design and post-silicon phases Stay current with industry trends and emerging DFT technologies Mentor junior engineers and contribute to the development of best practices and methodologies Participate in design reviews and provide technical guidance to ensure DFT requirements are met Collaborate with external partners and vendors to evaluate and integrate new DFT tools and technologies Qualifications Master's degree in Electrical Engineering, Computer Engineering, or a related field 7+ years of experience in ASIC development with a strong focus on DFT Advanced knowledge of ASIC design and development processes Expertise in Design for Testability (DFT) methodologies and techniques Strong programming skills in languages such as Verilog, VHDL, and C++ Proficiency in using EDA tools for ASIC design, verification, and testing In-depth understanding of semiconductor manufacturing processes Experience with advanced DFT techniques, including BIST and ATPG Knowledge of low-power design techniques Familiarity with industry standards such as IEEE 1149.1 and IEEE 1500 Excellent problem-solving and debugging skills Strong analytical and organizational abilities Exceptional communication and teamwork skills Domain expertise in the semiconductor industry, digital circuit design, and test and verification methodologies Ability to work efficiently in a fast-paced, detail-oriented environment Willingness to mentor junior engineers and contribute to team knowledge sharing Additional Information Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution. Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at jobs.accommodations@sandisk.com to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying. Experience Level Senior Level

Other Details

  • It is a Full Time Manufacturing job for candidates with 5 - 6+ years Experience.

More about this Senior ASIC Digital Design Engineer (DFT, MBIST, Scan) job

  1. Who is eligible to apply for this Senior ASIC Digital Design Engineer (DFT, MBIST, Scan) job at Sandisk India Device Design Centre Pvt.ltd?
    Ans : Candidates should have All Education levels for this Senior ASIC Digital Design Engineer (DFT, MBIST, Scan) job offered by Sandisk India Device Design Centre Pvt.ltd.
  2. How much can you earn in this position?
    Ans : Salary details will be shared during the hiring process.
  3. What shift and timings does this job follow?
    Ans : This Senior ASIC Digital Design Engineer (DFT, MBIST, Scan) job follows a Day shift.
  4. Do you need to visit the office for this job?
    Ans : Yes, candidates need to visit the office and work from the location in Goraguntepalya, Bangalore.
  5. How many vacancies are there for this Senior ASIC Digital Design Engineer (DFT, MBIST, Scan) job?
    Ans : There is 1 vacancy for this Senior ASIC Digital Design Engineer (DFT, MBIST, Scan) role.
  6. Is this job open for all genders?
    Ans : Yes, this Senior ASIC Digital Design Engineer (DFT, MBIST, Scan) job is open for both male and female candidates.
  7. What is the job location for this position?
    Ans : The job location for this Senior ASIC Digital Design Engineer (DFT, MBIST, Scan) position is Goraguntepalya, Bangalore.
  8. What makes this Senior ASIC Digital Design Engineer (DFT, MBIST, Scan) job a good opportunity?
    Ans : The employer has not disclosed the salary for this role, but it is a Full Time opportunity with 1 opening.
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Contact Person

SANDISK INDIA DEVICE DESIGN CENTRE PVT.LTD
Posted 3 days ago
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