Formal Verification Engineer Job Details: Job Description: The Role and Impact Intel is seeking a Formal Verification Engineer for the Silicon Chassis team. This role focuses on applying formal methods to exhaustively verify our interconnect fabric, protocol bridges, and link-layer logic. You will own end-to-end formal verification, from property specification through proof convergence - across multiple protocol domains. You will work closely with architecture, design, and software teams and are expected to contribute across traditional discipline boundaries. This role requires strong Formal depth, solid protocol knowledge, hands-on coding strength, and growing ability to mentor junior engineers. AI-assisted workflows are part of everyday development here. Consistent execution against schedule and quality goals is expected. Key Responsibilities - Develop and execute comprehensive formal verification test and coverage plans, including the definition of scope, strategy, and techniques. - Create abstraction models to enable convergence on designs and apply abstraction techniques to formal verification. - Generate and validate formal proofs to implement verification plans and resolve failing tests through corrective measures. - Collaborate across architecture, RTL design, and physical design teams to improve the verification of complex architectural and microarchitectural features. - Maintain and enhance existing formal verification infrastructure, tools, and methodologies. - Simplify and model problems using architecture modeling techniques to verify protocols and architectures. - Utilize tools to formally prove design protocols, resolve BDD complexity, and optimize data paths. - Document test plans, track verification progress, and drive technical reviews with cross-functional teams. Qualifications: Minimum Qualifications - Bachelor's or Master's degree in Electrical Engineering, Computer Science, BS/MS or a related discipline, along with 4–13 years of hands-on experience in Formal Verification. - Proficiency in formal verification tools and methodologies, including model checking and equivalence checking. - Strong knowledge of System Verilog, Verilog, and logic/microarchitecture fundamentals. - Experience with abstraction modeling, simulation techniques, and convergence strategies. - Familiarity with Binary Decision Diagrams (BDD) and Data Flow Graphs (DFG). Preferred Qualifications - Proven ability to apply problem-solving skills to resolve complex architectural and verification challenges. - Strong collaboration and teamwork skills, with experience working in cross-functional teams. - Excellent technical documentation and communication abilities. - Passion for driving innovation and advancing the state of verification tools and methodologies. If you are excited about the opportunity to work on cutting-edge technology and contribute to shaping the future of computing, we encourage you to apply and join Intel's journey of innovation and excellence. Job Type: Experienced Hire Shift: Shift 1 (India) Primary Location: India, Bangalore Additional Locations: Business group: The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. • Job posting details (such as work model, location or time type) are subject to change. • ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
अन्य डिटेल्स
- It is a Full Time Manufacturing job for candidates with 4 - 6+ years Experience.
What are the eligibility criteria for this Formal Verification Engineer job?
Ans : Candidates should have All Education levels with 4-7 years of experience for this Formal Verification Engineer job offered by Intel Technology India Private Limited in Peenya 2nd Stage, Bangalore.
What salary is offered for this Formal Verification Engineer job?
Ans : Salary details will be shared during the hiring process.
What shift and timings does this job follow?
Ans : This Formal Verification Engineer job follows a Day shift.
Do you need to visit the office for this job?
Ans : Yes, candidates need to visit the office and work from the location in Peenya 2nd Stage, Bangalore.
How many openings are available for this position?
Ans : There is 1 opening available for this position.
Is this job open for all genders?
Ans : Yes, this Formal Verification Engineer job is open for both male and female candidates.
Where is this job located?
Ans : This Formal Verification Engineer job is located in Peenya 2nd Stage, Bangalore.
Why should you apply for this Formal Verification Engineer job?
Ans : The employer has not disclosed the salary for this role, but it is a Full Time opportunity with 1 opening available.