Hardware Design and Systems Enablement Engineer

Systems and Hardware Enabling Engineer Job Details: Job Description: Customer Systems and Hardware Enabling Engineer We are looking for a Customer Facing Hardware Design Enabling Engineer to support Xeon based data center and server platforms, working directly with customers to enable high-quality, high-performance system designs. This role focuses on end-to-end hardware design enablement, with Signal Integrity as a preferred area of expertise. Key Responsibilities Serve as the primary hardware enablement interface for data center and enterprise customers, supporting platform design, bring‑up, debug, validation, and issue resolution. Provide system‑level design guidance across CPU, memory, PCIe, storage, power delivery, PCB architecture, and high‑speed I/O interfaces. Review customer schematics, PCB layouts, stack‑ups, and routing topologies to identify signal integrity (SI) and power integrity (PI) risks and recommend optimized design solutions. Support hardware bring‑up, board debug, and lab validation using oscilloscopes, protocol analysers, logic analysers, and JTAG debuggers. Collaborate closely with architecture, validation, firmware, BIOS, and design teams to drive technical issues to closure. Work with ODMs and ecosystem partners on joint hardware designs, design reviews, compliance activities, and manufacturing readiness. Drive hardware design best practices and provide technical leadership during customer meetings, schematic/layout reviews, and technical discussions. Support signal integrity and power integrity analysis for high‑speed interfaces including PCIe, DDR, Technologies. Partner with cross‑functional global engineering teams to ensure successful platform execution and customer enablement Qualifications: Preferred Skills and Experience: Experience working with high performance computer platforms such as Intel® Xeon®, AMD x86, or equivalent architectures. Proven expertise in designing dense, high layer count PCBs (typically 8 to 20+ layers). Hands on experience with high-speed interfaces including PCIe Gen5/Gen6, DDR4/5and related technologies. Proficiency with EDA tools such as Cadence Allegro, Concept HDL, and PCB Designer. Strong hardware debug skills using oscilloscopes, logic analyzers, and protocol analyzers. Experience in Signal Integrity (SI) analysis is an added advantage. Knowledge of SerDes fundamentals, including NRZ signaling, with exposure to PAM4 signaling preferred. Understanding of PCBA development flows and manufacturing processes. Excellent verbal and written communication skills with proven customer facing experience. Demonstrated ability to lead technical discussions, deliver technical presentations, and influence cross functional engineering teams. Strong collaboration skills with experience working in multi-site and global engineering environments. Qualifications: Bachelor’s or master’s degree in electrical / Electronic Engineering or related field. 5-10 years of experience in hardware design, signal integrity, system enablement, or server platforms. Experience with Xeon based or data center systems is highly preferred. Job Type: Experienced Hire Shift: Shift 1 (India) Primary Location: India, Bangalore Additional Locations: Business group: At the Data Center Group (DCG), we're committed to delivering exceptional products and delighting our customers. We offer both broad-market Xeon-based solutions and custom x86-based products, ensuring tailored innovation for diverse needs across general-purpose compute, web services, HPC, and AI-accelerated systems. Our charter encompasses defining business strategy and roadmaps, product management, developing ecosystems and business opportunities, delivering strong financial performance, and reinvigorating x86 leadership. Join us as we transform the data center segment through workload driven leadership products and close collaboration with our partners. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. • Job posting details (such as work model, location or time type) are subject to change. • ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.