AI/ML Hardware Architect

AI/ML Hardware Architect, Cloud, Silicon Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. 4 years of experience in any one of the following areas: architecture and micro-architecture design of graphics, Machine Learning (ML), or managing low-precision or mixed-precision numerics, vector processors, DSP processors, or architecting networking ASICs. Experience in memory hierarchy, memory controllers, High Bandwidth Memory (HBM), and Dynamic Random-Access Memory (DRAM) technologies. Preferred qualifications: Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture. Experience working with software teams optimizing the hardware/software interface. Experience in estimating performance by analysis, modeling, and network simulation in defining and driving performance test plans. Experience in programming languages (e.g., C++, Python). Knowledge of arithmetic units, bus architectures, accelerators or memory hierarchies and high performance and low power design techniques. 4 years of experience in any one of the following areas: architecture and micro-architecture design of graphics, Machine Learning (ML), or managing low-precision or mixed-precision numerics, vector processors, DSP processors, or architecting networking ASICs. 4 years of experience in any one of the following areas: architecture and micro-architecture design of graphics, Machine Learning (ML), or managing low-precision or mixed-precision numerics, vector processors, DSP processors, or architecting networking ASICs. 4 years of experience in any one of the following areas: architecture and micro-architecture design of graphics, Machine Learning (ML), or managing low-precision or mixed-precision numerics, vector processors, DSP processors, or architecting networking ASICs. About the job Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide. We're the driving team behind Google's groundbreaking innovations, empowering the development of our AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. Responsibilities Develop architecture specifications that meet current and future computing requirements for AI/ML roadmap. Develop architectural and microarchitectural power/performance models, microarchitecture and evaluate quantitative and qualitative performance and power analysis. Partner with hardware design, software, compiler, Machine Learning (ML) model and research teams for effective hardware/software co-design, creating high performance hardware/software interfaces. Evaluate different silicon solutions for executing Google’s data center Artificial Intelligence (AI) accelerator roadmap, components, vendor co-developments, custom designs and chiplets. Create high performance hardware/software interfaces. Collaborate with software, verification, emulation, physical design, packaging and silicon validation stakeholders to ensure designs are complete, correct and performant. Own microarchitecture of compute blocks and subsystems. Identify and drive power, performance and area improvements for the modules owned. Develop and contribute to the simulations tools. Experience Level Senior Level